VLSI CMOS Archives - Page 3 of 3 - CS Electrical & Electronics

All Questions › Category: VLSI CMOS

Filter:All Open Resolved Closed Unanswered
Positive photo resists are used more than negative photo resists because?
OpenChetan Shidling asked 5 years ago • VLSI CMOS
344 views0 answers0 votes
Shallow trench isolation process is used to prevent___?
OpenChetan Shidling asked 5 years ago • VLSI CMOS
362 views0 answers0 votes
Which one of the following is not the advantage of ion-implantation over diffusion doping?
OpenChetan Shidling asked 5 years ago • VLSI CMOS
281 views0 answers1 votes
Typical diameter of wafer used in today's process is?
OpenChetan Shidling asked 5 years ago • VLSI CMOS
445 views0 answers0 votes
Photoresist is used for?
OpenChetan Shidling asked 5 years ago • VLSI CMOS
285 views0 answers0 votes
nMOS passes ______ ‘0’ & pMOS passes _____’1′?
OpenChetan Shidling asked 5 years ago • VLSI CMOS
302 views0 answers0 votes
The n-type dopants used in CMOS fabrication are?
OpenChetan Shidling asked 5 years ago • VLSI CMOS
609 views0 answers0 votes
UV Lithography is used for?
OpenChetan Shidling asked 5 years ago • VLSI CMOS
410 views0 answers0 votes
Self-Aligned silicide process is used to ____ and ____?
OpenChetan Shidling asked 5 years ago • VLSI CMOS
261 views0 answers0 votes
Semiconductors are sensitive to?
OpenChetan Shidling asked 5 years ago • VLSI CMOS
413 views0 answers0 votes
What is the primary motivation for replacing planar MOSFETs with FinFETs?
OpenChetan Shidling asked 5 years ago • VLSI CMOS
2032 views0 answers4 votes
The effect of the trench edge has given rise to__?
OpenChetan Shidling asked 5 years ago • VLSI CMOS
298 views0 answers0 votes
Annealing in VLSI fabrication means?
OpenChetan Shidling asked 5 years ago • VLSI CMOS
368 views0 answers0 votes
For VLSI fabrication silicon is preferred compared to Germanium for the following reason?
OpenChetan Shidling asked 5 years ago • VLSI CMOS
286 views0 answers0 votes
What is stick diagram in CMOS?
OpenChetan Shidling asked 5 years ago • VLSI CMOS
643 views0 answers0 votes
With increasing temperature the channel current of a MOSFET?
OpenChetan Shidling asked 5 years ago • VLSI CMOS
235 views0 answers0 votes
The best device for use as a switch is?
OpenChetan Shidling asked 5 years ago • VLSI CMOS
315 views0 answers0 votes
What effect does increasing VGS have on the depth of inversion layer?
OpenChetan Shidling asked 5 years ago • VLSI CMOS
253 views0 answers0 votes
At onset of Saturation, what is the voltage between gate and drain end of the channel?
OpenChetan Shidling asked 5 years ago • VLSI CMOS
258 views0 answers0 votes
In a n-channel MOSFET device in saturation, the depth of inversion layer is greater at?
OpenChetan Shidling asked 5 years ago • VLSI CMOS
520 views0 answers-1 votes
Which of the following devices has the highest input impedance?
OpenChetan Shidling asked 5 years ago • VLSI CMOS
405 views0 answers0 votes
A MOSFET can be operated with?
OpenChetan Shidling asked 5 years ago • VLSI CMOS
486 views0 answers0 votes
For an n-channel enhancement mode MOSFET, the drain current?
OpenChetan Shidling asked 5 years ago • VLSI CMOS
267 views0 answers0 votes
For a MOSFET, the gate current is?
OpenChetan Shidling asked 5 years ago • VLSI CMOS
293 views0 answers0 votes
How are zener diodes placed between supply rails internally in MOSFET circuits at the I/O pads for protection against electrostatic discharge?
OpenChetan Shidling asked 5 years ago • VLSI CMOS
252 views0 answers0 votes
The input current of JFET and MOSFET are basically the leakage currents of ____ & ____ respectively?
OpenChetan Shidling asked 5 years ago • VLSI CMOS
626 views0 answers1 votes
Which action plays a significant role in enhancing the conductivity of channel by inducing the free electrons especially in enhancement mode of N-channel MOSFET?
OpenChetan Shidling asked 5 years ago • VLSI CMOS
741 views0 answers-2 votes
FETs are widely applicable in oscilloscopes and voltmeters as an input amplifier as compared to bipolar transistor due to ____?
AnsweredChetan Shidling asked 5 years ago • VLSI CMOS
544 views1 answers0 votes
The N channel enhancement type basically termed as normally-OFF MOSFET works with______?
OpenChetan Shidling asked 5 years ago • VLSI CMOS
418 views0 answers1 votes
Which of the following devices supports a drain current with zero gate to source voltage?
OpenChetan Shidling asked 5 years ago • VLSI CMOS
213 views0 answers0 votes
The term "Polygon" in context of VLSI design refers to?
OpenChetan Shidling asked 5 years ago • VLSI CMOS
674 views0 answers-1 votes
_______is the most popular standard logic device family today?
OpenChetan Shidling asked 5 years ago • VLSI CMOS
283 views0 answers0 votes
Which of the following are accurate wrt EDA tool usage?
OpenChetan Shidling asked 5 years ago • VLSI CMOS
465 views0 answers0 votes
RTL contains?
OpenChetan Shidling asked 5 years ago • VLSI CMOS
273 views0 answers0 votes
Which of the following is/are the different domains of modelling Y-diagram?
AnsweredChetan Shidling asked 5 years ago • VLSI CMOS
670 views1 answers0 votes
What is fullform of ASIC is?
AnsweredChetan Shidling asked 5 years ago • VLSI CMOS
642 views1 answers0 votes
Identify the step in a design flow that generates a Gate level net list?
AnsweredChetan Shidling asked 5 years ago • VLSI CMOS
454 views1 answers0 votes
What is RTL in VLSI?
OpenChetan Shidling asked 5 years ago • VLSI CMOS
897 views0 answers1 votes
Which MOS is controlled in P-well, N-well and twin-tub process in fabrication?
OpenChetan Shidling asked 5 years ago • VLSI CMOS
471 views0 answers0 votes
Why P-sub is preferred over N-sub? Give reason.
OpenChetan Shidling asked 5 years ago • VLSI CMOS
903 views0 answers0 votes
Discuss the recent trends in fabrication technology?
OpenChetan Shidling asked 5 years ago • VLSI CMOS
498 views0 answers0 votes
Illustrate the FinFET device working?
OpenChetan Shidling asked 5 years ago • VLSI CMOS
364 views0 answers0 votes
Write a short note on. Differentiate between N-sub and P-sub. Differentiate between P-well, N-well and twin tub processes in CMOS?
OpenChetan Shidling asked 5 years ago • VLSI CMOS
417 views0 answers0 votes
Explain the different process steps involved in fabrication of CMOS inverter n well process, with neat diagrams?
OpenChetan Shidling asked 5 years ago • VLSI CMOS
331 views0 answers0 votes
Explain the different process steps involved in fabrication of CMOS inverter in twin tube process, with neat diagram?
OpenChetan Shidling asked 5 years ago • VLSI CMOS
323 views0 answers0 votes
Explain the processes of oxidation, diffusion, deposition and ion implantation with neat figures and appropriate equations?
OpenChetan Shidling asked 5 years ago • VLSI CMOS
328 views0 answers-1 votes
Explain Czochraiski(CZ) method of growing silicon ingots with a neat figure?
OpenChetan Shidling asked 5 years ago • VLSI CMOS
277 views0 answers0 votes
Discuss the VLSI design flow with neat diagram?
OpenChetan Shidling asked 5 years ago • VLSI CMOS
309 views0 answers0 votes
What is full form of VLSI and why VLSI?
OpenChetan Shidling asked 5 years ago • VLSI CMOS
281 views0 answers0 votes
« Previous 1 23

Share Now