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For addressing in real mode, which segment plays a significant role in the storage of destination operands during the string operation?
AnsweredJayesh Bornare asked 3 years ago • Embedded System
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In the test registers, what do/does the linear address bit hold/s with respect to TLB (Translation Look-aside Buffers)?
AnsweredJayesh Bornare asked 3 years ago • Embedded System
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Which kind of low-order 16 bits control register is also regarded as ‘Machine Status Word’ (MSW) in order to make it compatible with i286?
AnsweredJayesh Bornare asked 3 years ago • Embedded System
252 views1 answers0 votes
In ADSP 21xx architecture, which notation represents ALU overflow condition?
AnsweredJayesh Bornare asked 3 years ago • Embedded System
426 views1 answers0 votes
In CPU structure, what kind of instruction to be executed is held by an instruction Register (IR)?
AnsweredJayesh Bornare asked 3 years ago • Embedded System
171 views1 answers0 votes
In CPU structure, which register provides the address for fetching of data or instruction especially by means of processor?
AnsweredJayesh Bornare asked 3 years ago • Embedded System
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In CPU structure, where is one of the operand provided by an accumulator in order to store the result?
AnsweredJayesh Bornare asked 3 years ago • Embedded System
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In CPU structure, where is one of the operand provided by an accumulator in order to store the result?
AnsweredJayesh Bornare asked 3 years ago • Embedded System
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In Von Neumann architecture, which among the following handles all the operations of the system that are inside and outside the processor?
AnsweredJayesh Bornare asked 3 years ago • Embedded System
339 views1 answers-1 votes
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AnsweredJayesh Bornare asked 3 years ago • Embedded System
387 views1 answers0 votes
Which among the following is/are integrated by OTG controller in order to implement OTG dual-role device functionality?
AnsweredJayesh Bornare asked 3 years ago • Embedded System
292 views1 answers0 votes
Which type of handshake packet indicates that the device is incapable of accepting data as it is supposed to be busy with some another task?
AnsweredJayesh Bornare asked 3 years ago • Embedded System
404 views1 answers0 votes
What is the size range of the alphanumeric LCDs?
AnsweredJayesh Bornare asked 3 years ago • Embedded System
468 views1 answers0 votes
In LPC 2148, which among the following is/are the functions of Mask register?
AnsweredJayesh Bornare asked 3 years ago • Embedded System
254 views1 answers0 votes
In DAC 0808, what is the high speed multiplying input slew rate?
AnsweredJayesh Bornare asked 3 years ago • Embedded System
335 views1 answers0 votes
In DAC 0808, which among the following is configured as a reference in addition to R-2R ladder and current switches?
AnsweredJayesh Bornare asked 3 years ago • Embedded System
428 views1 answers0 votes
While designing an embedded system, which sub-task oriented process allocates the time steps for various modules that share the similar resources?
AnsweredJayesh Bornare asked 3 years ago • Embedded System
302 views1 answers0 votes
At an active HIGH reset pin of 8051 microcontroller, for how many machine cycles should the positive going pulse be provided, if the power is switched ON?
AnsweredJayesh Bornare asked 3 years ago • Embedded System
234 views1 answers0 votes
What is/are the configuration status of control unit in RISC Processors?
AnsweredJayesh Bornare asked 3 years ago • Embedded System
325 views1 answers0 votes
How is the nature of instruction size in CISC processors?
AnsweredJayesh Bornare asked 3 years ago • Embedded System
363 views1 answers0 votes
Which parameter/s is/are included in ‘Time to market’ design metric of an embedded system?
AnsweredJayesh Bornare asked 3 years ago • Embedded System
418 views1 answers0 votes
If the three stages of execution in pipelining are overlapped, how would be the speed of execution?
AnsweredJayesh Bornare asked 3 years ago • Embedded System
787 views1 answers0 votes
In the process of pipelining, which instructions are fetched from the memory by the ARM processor during the execution of current instruction?
AnsweredJayesh Bornare asked 3 years ago • Embedded System
350 views1 answers0 votes
Abort mode generally enters when _______
AnsweredJayesh Bornare asked 3 years ago • Embedded System
321 views1 answers0 votes
Which type of non-privileged processor mode is entered due to raising of high priority of an interrupt?
AnsweredJayesh Bornare asked 3 years ago • Embedded System
369 views1 answers0 votes
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