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What is wheel speed sensor in vehicle?
Answeredchetan shidling asked 5 years ago • Automotive Electronics
533 views1 answers0 votes
What is Engine speed sensor in vehicle?
Answeredchetan shidling asked 5 years ago • Automotive Electronics
748 views1 answers0 votes
What are the types of sensors and actuators used in automotive industry?
Answeredchetan shidling asked 5 years ago • Automotive Electronics
490 views1 answers0 votes
Difference between manual and automatic transmission system !
AnsweredChetan Shidling asked 5 years ago • Automotive Electronics
570 views1 answers0 votes
What are the limitation of Dynamic CMOS logic?
Answeredchetan shidling asked 5 years ago • VLSI CMOS
1113 views1 answers0 votes
Explain the working of clocked CMOS logic circuit?
Openchetan shidling asked 5 years ago • VLSI CMOS
560 views0 answers0 votes
Compare static CMOS logic and Pseudo NMOS logic with an example?
Openchetan shidling asked 5 years ago • VLSI CMOS
362 views0 answers0 votes
What is full form of CPL in VLSI CMOS?
Answeredchetan shidling asked 5 years ago • VLSI CMOS
1169 views1 answers0 votes
What is full form of CVSL in VLSI CMOS?
Answeredchetan shidling asked 5 years ago • VLSI CMOS
745 views1 answers0 votes
What is try and catch blocks in exception handling?
AnsweredChetan Shidling asked 5 years ago • Cpp Language
679 views2 answers0 votes
What is catch block in exception handling?
AnsweredChetan Shidling asked 5 years ago • Cpp Language
504 views1 answers0 votes
What is try block in exception handling in Cpp?
AnsweredChetan Shidling asked 5 years ago • Cpp Language
532 views2 answers0 votes
What is syntax of try and catch block in exception handling in Cpp?
AnsweredChetan Shidling asked 5 years ago • Cpp Language
550 views1 answers0 votes
What is catch keyword in exception handling in C++?
AnsweredChetan Shidling asked 5 years ago • Cpp Language
427 views1 answers0 votes
What is throw keyword in exception handling in C++?
AnsweredChetan Shidling asked 5 years ago • Cpp Language
432 views1 answers0 votes
What is try keyword in exception handling in C++?
AnsweredChetan Shidling asked 5 years ago • Cpp Language
503 views1 answers0 votes
What is exception handling?
AnsweredChetan Shidling asked 5 years ago • Cpp Language
462 views1 answers0 votes
What is an exception?
AnsweredChetan Shidling asked 5 years ago • Cpp Language
448 views1 answers0 votes
Draw the Stick-diagram for the Boolean functions?
OpenChetan Shidling asked 5 years ago • VLSI CMOS
428 views0 answers-1 votes
Draw the stick-diagram for the Boolean expression?
OpenChetan Shidling asked 5 years ago • VLSI CMOS
441 views0 answers0 votes
What are the objectives for Euler path and Stick Diagrams?
AnsweredChetan Shidling asked 5 years ago • VLSI CMOS
649 views1 answers0 votes
Expression for simple delay model for CMOS gates?
AnsweredChetan Shidling asked 5 years ago • VLSI CMOS
422 views1 answers0 votes
What are the factors by which time delay of the Gate is affected?
AnsweredChetan Shidling asked 5 years ago • VLSI CMOS
417 views1 answers0 votes
What is the worst case propagation delay of the circuit?
AnsweredChetan Shidling asked 5 years ago • VLSI CMOS
701 views1 answers0 votes
R = 10K, C=0.1pF, then the buffer will experience a delay of Td ?
AnsweredChetan Shidling asked 5 years ago • VLSI CMOS
420 views1 answers0 votes
What is RC model in CMOS VLSI circuits?
OpenChetan Shidling asked 5 years ago • VLSI CMOS
325 views0 answers0 votes
What is propagation delay in CMOS VLSI circuits?
AnsweredChetan Shidling asked 5 years ago • VLSI CMOS
404 views1 answers0 votes
What is tpLH and tpHL in CMOS VLSI circuits?
AnsweredChetan Shidling asked 5 years ago • VLSI CMOS
1060 views1 answers0 votes
What is fall time in CMOS VLSI circuits ?
AnsweredChetan Shidling asked 5 years ago • VLSI CMOS
429 views1 answers0 votes
What is Rise time in CMOS VLSI circuits?
AnsweredChetan Shidling asked 5 years ago • VLSI CMOS
775 views1 answers0 votes
What is Gate delays in VLSI CMOS circuits?
OpenChetan Shidling asked 5 years ago • VLSI CMOS
298 views0 answers0 votes
What are timing parameters in VLSI?
AnsweredChetan Shidling asked 5 years ago • VLSI CMOS
404 views1 answers0 votes
Explain the characteristics of
OpenChetan Shidling asked 5 years ago • VLSI CMOS
302 views0 answers0 votes
Realize equations for Full adder, and draw the gate level representation and stick diagram using CMOS logic?
OpenChetan Shidling asked 5 years ago • VLSI CMOS
364 views0 answers0 votes
With a neat diagram, explain the various timing parameters of a CMOS circuit?
AnsweredChetan Shidling asked 5 years ago • VLSI CMOS
873 views1 answers0 votes
State the objectives which are addressed using Euler’s path to draw stick-diagrams?
OpenChetan Shidling asked 5 years ago • VLSI CMOS
271 views0 answers0 votes
Draw the stick-diagram for the following Boolean expression using Euler’s path?
OpenChetan Shidling asked 5 years ago • VLSI CMOS
455 views0 answers0 votes
Draw the stick diagram of 4:1 MUX ?
OpenChetan Shidling asked 5 years ago • VLSI CMOS
1240 views0 answers1 votes
Draw the stick-diagram of 2-input NAND gate and 2:1 MUX ?
OpenChetan Shidling asked 5 years ago • VLSI CMOS
1067 views0 answers0 votes
Which of the following statements is incorrect?
Answeredcs asked 5 years ago • VLSI CMOS
1012 views1 answers0 votes
What happens when we assign same values in two variables, is their address remains same?
Answeredchetan shidling asked 5 years ago • Python
608 views2 answers0 votes
How to convert values of int and float into complex number in python?
Answeredchetan shidling asked 5 years ago • Python
480 views1 answers0 votes
How to convert float value into int value in python?
Answeredchetan shidling asked 5 years ago • Python
476 views1 answers0 votes
Which of the following is not an objective for using Euler's path to draw stick diagrams?
Answeredcs asked 5 years ago • VLSI CMOS
397 views1 answers0 votes
Which of the following is not true about Latch-up in CMOS circuits?
Answeredcs asked 5 years ago • VLSI CMOS
377 views1 answers0 votes
In clocked CMOS logic, output in evaluated in?
Answeredcs asked 5 years ago • VLSI CMOS
834 views1 answers0 votes
In the equivalent circuit for PMOS, if the sheet resistance is 20Kohm and width of MOS is 4, then the Drain-Source resistance when the PMOS is ON is numerically equal to?
Answeredcs asked 5 years ago • VLSI CMOS
446 views1 answers0 votes
Pseudo-nMOS has higher pull-up resistance than nMOS device?
Answeredcs asked 5 years ago • VLSI CMOS
424 views1 answers0 votes
Pull Down Network will conduct for all input combinations that requires output Y to be
Answeredcs asked 5 years ago • VLSI CMOS
402 views1 answers0 votes
What is RC Extraction in CMOS VLSI?
Answeredcs asked 5 years ago • VLSI CMOS
652 views1 answers0 votes
What is full form of DRC in CMOS VLSI?
Answeredcs asked 5 years ago • VLSI CMOS
403 views1 answers0 votes
What is Latch-up in CMOS circuits?
Answeredcs asked 5 years ago • VLSI CMOS
444 views1 answers0 votes
What is precharge state in CMOS Dynamic logic?
Opencs asked 5 years ago • VLSI CMOS
347 views0 answers0 votes
What is evaluate state in CMOS Dynamic logic?
Opencs asked 5 years ago • VLSI CMOS
327 views0 answers0 votes
What is Clocked-CMOS logic?
Answeredcs asked 5 years ago • VLSI CMOS
512 views1 answers-1 votes
Difference between dynamic and static logic design?
Answeredcs asked 5 years ago • VLSI CMOS
509 views1 answers0 votes
What is Pseudo NMOS logic in CMOS VLSI?
Answeredcs asked 5 years ago • VLSI CMOS
567 views1 answers0 votes
What are the types of logic circuits in CMOS?
Answeredcs asked 5 years ago • VLSI CMOS
457 views1 answers0 votes
What type of MOS is preferable for PUN?
Opencs asked 5 years ago • VLSI CMOS
351 views0 answers0 votes
What type of MOS is preferable for PDN?
Opencs asked 5 years ago • VLSI CMOS
341 views0 answers0 votes
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