VLSI Projects For Electronics Engineers
The design, development, and implementation of integrated circuits (ICs) or chips that contain a significant number of transistors and electronic components on a single silicon substrate are referred to as VLSI (Very Large Scale Integration) projects for electronics engineers. A thorough understanding of digital and analog circuit design, semiconductor physics, and fabrication techniques is frequently necessary for these tasks.
Project No: 01 Title: QCA-Based Design of Cost-Efficient Code Converter with Temperature Stability and Energy Efficiency Analysis
Project No: 02 Title: Carbon Nanotube Field Effect Transistor (CNTFET) and Resistive Random Access Memory (RRAM) Based Ternary Combinational Logic Circuits
Project No: 03 Title: Binary Coded Decimal Seven Segment Circuit Designing Using QCA
Project No: 04 Title: Area Efficient Multilayer Arithmetic Logic Unit Implementation in Quantum-Dot Cellular Automata
Project No: 05 Title: Performance Analysis of Wallace Tree Multiplier with Kogge Stone Adder Using 15-4 Compressor
Project No: 06 Title: A High-Performance Multiply-Accumulate Unit by Integrating Additions and Accumulations into Partial Product Reduction Process
Project No: 07 Title: Borrow Select Subtractor for Low Power and Area Efficiency
Project No: 08 Title: Security Enhancement of Information Using Multilayered Cryptographic Algorithm
Project No: 09 Title: Low-Power Multiplexer Structures Targeting Efficient QCA
Project No: 10 Title: Low Error Efficient Approximate Adders for FPGAs
Project No: 11 Title: SAM: A Segmentation-Based Approximate Multiplier for Error-Tolerant Applications
Project No: 12 Title: Constant-Time Synchronous Binary Counter with Minimal Clock Period
Project No: 13 Title: Fast Mapping and Updating Algorithms for a Binary CAM on FPGA
Project No: 14 Title: Design and Analysis of Approximate Compressors for Balanced Error Accumulation in MAC Operator
Project No: 15 Title: Virtex 7 FPGA Implementation of 256-Bit Key AES Algorithm with Key Schedule and Sub Bytes Block Optimization
Project No: 16 Title: TIQ Flash ADC with Threshold Compensation
Project No: 17 Title: Rapid Low Power Voltage Level Shifter Utilizing Regulated Cross-Coupled Pull-Up Network
Project No: 18 Title: A New Energy-Efficient and High Throughput Two-Phase Multi-Bit Per Cycle Ring Oscillator-Based True Random Number Generator
Project No: 19 Title: Data Retention-Based Low Leakage Power TCAM for Network Packet Routing
Project No: 20 Title: A Low-Power High-Speed Sense-Amplifier-Based Flip-Flop in 55nm MTCMOS
Project No: 21 Title: Double Current Limiter High-Performance Voltage-Level Shifter for IoT Applications
Project No: 22 Title: Design of Approximate Multiplier Less DCT with CSD Encoding for Image Processing
Project No: 23 Title: Constant-Time Synchronous Binary Counter with Minimal Clock Period
Project No: 24 Title: Virtex 7 FPGA Implementation of 256-Bit Key AES Algorithm with Key Schedule and Sub Bytes Block Optimization
Project No: 25 Title: Design and Analysis of Approximate Compressors for Balanced Error Accumulation in MAC Operator
Project No: 26 Title: Fast Mapping and Updating Algorithms for a Binary CAM on FPGA
Project No: 27 Title: SAM: A Segmentation-Based Approximate Multiplier for Error-Tolerant Applications
Project No: 28 Title: Low Error Efficient Approximate Adders for FPGAs
Project No: 29 Title: Low-Power Multiplexer Structures Targeting Efficient QCA
Project No: 30 Title: Security Enhancement of Information Using Multilayered Cryptographic Algorithm
Project No: 31 Title: Borrow Select Subtractor for Low Power and Area Efficiency
Project No: 32 Title: A High-Performance Multiply-Accumulate Unit by Integrating Additions and Accumulations into Partial Product Reduction Process
Project No: 33 Title: Performance Analysis of Wallace Tree Multiplier with Kogge Stone Adder Using 15-4 Compressor
Project No: 34 Title: Area Efficient Multilayer Arithmetic Logic Unit Implementation in Quantum-Dot Cellular Automata
Project No: 35 Title: Binary Coded Decimal Seven Segment Circuit Designing Using QCA
Project No: 36 Title: Carbon Nanotube Field Effect Transistor (CNTFET) and Resistive Random Access Memory (RRAM) Based Ternary Combinational Logic Circuits
Project No: 37 Title: QCA-Based Design of Cost-Efficient Code Converter with Temperature Stability and Energy Efficiency Analysis
Project No: 38 Title: Low Power High Performance 4 Bit Vedic Multiplier is 32nm
Project No: 39 Title: Accuracy-Configurable Radix-4 Adder with a Dynamic Output Modification Scheme
Project No: 40 Title: Very-Low-Voltage Frequency Divider in Folded MOS Current Mode Logic with Complementary N- and P-Type Flip-Flops
Project No: 41 Title: Low-Power Retentive True Single-Phase-Clocked Flip-Flop with Redundant-Precharge-Free Operation
Project No: 42 Title: Low-Power Timing-Error-Tolerant Circuit by Controlling a Clock
Project No: 43 Title: A Low-Power High-Speed Sense-Amplifier-Based Flip-Flop in 55nm MTCMOS
Project No: 44 Title: Anti-PVT-Variation Low-Power Time-to-Digital Converter Design Using 90-NM CMOS Process
Project No: 45 Title: BTI and Soft-Error Tolerant Voltage Bootstrapped Schmitt Trigger Circuit
Project No: 46 Title: A Three-Stage Comparator and Its Modified Version with Fast Speed and Low Kickback
Project No: 47 Title: Two-Stage OTA with All Subthreshold MOSFETs and Optimum GBW to DC-Current Ratio
Project No: 48 Title: Low Power 3-Bit Encoder Design Using Memristor
Project No: 49 Title: A Reliable Low Standby Power 10T SRAM Cell with Expanded Static Noise Margins
Project No: 50 Title: Design of Three-Stage Dynamic Comparator with Tail Transistor Using 45nm Technology
Project No: 51 Title: A New Design of High Gain Low Power CMOS Amplifier
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